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| Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using 'trench' technology which features very low on-state resistance. It is intended for use in automotive and general purpose switching applications. BUK7506-55A QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V MAX. 55 75 230 175 6.3 UNIT V A W C m PINNING - TO220AB PIN 1 2 3 tab gate drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g source drain 1 23 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR VGS ID ID IDM Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 k Tmb = 25 C Tmb = 100 C Tmb = 25 C Tmb = 25 C MIN. - 55 MAX. 55 55 20 75 75 240 230 175 UNIT V V V A A A W C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS in free air TYP. 60 MAX. 0.65 UNIT K/W K/W December 1998 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET STATIC CHARACTERISTICS Tj= 25C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55C VDS = VGS; ID = 1 mA Tj = 175C Tj = -55C VDS = 55 V; VGS = 0 V; VGS = 20 V; VDS = 0 V VGS = 10 V; ID = 25 A Tj = 175C Tj = 175C MIN. 55 50 2 1 - BUK7506-55A TYP. 3.0 0.05 2 5.3 - MAX. 4.0 4.4 10 500 100 6.3 13.2 UNIT V V V V V A A nA m m DYNAMIC CHARACTERISTICS Tmb = 25C unless otherwise specified SYMBOL Ciss Coss Crss td on tr td off tf Ld Ld Ls PARAMETER Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. TYP. 4500 1000 620 35 115 155 110 3.5 4.5 7.5 MAX. 6000 1200 820 55 175 230 155 UNIT pF pF pF ns ns ns ns nH nH nH VDD = 30 V; Rload =1.2; VGS = 10 V; RG = 10 Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 25 A; VGS = 0 V IF = 75 A; VGS = 0 V IF = 75 A; -dIF/dt = 100 A/s; VGS = -10 V; VR = 30 V TYP. 0.85 1.1 80 0.2 MAX. 75 240 1.2 UNIT A A V V ns C AVALANCHE LIMITING VALUE SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 75 A; VDD 25 V; VGS = 10 V; RGS = 50 ; Tmb = 25 C MIN. TYP. MAX. 500 UNIT mJ December 1998 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7506-55A 120 110 100 90 80 70 60 50 40 30 20 10 0 PD% Normalised Power Derating 1 D= 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0 Zth / (K/W) P D tp D= tp T t T 0 20 40 60 80 100 Tmb / C 120 140 160 180 0.001 0.00001 0.001 t/S 0.1 10 Fig.1. Normalised power dissipation. PD% = 100PD/PD 25 C = f(Tmb) 400 ID/A Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T 120 110 100 90 80 70 60 50 40 30 20 10 0 ID% Normalised Current Derating 20 14 12 10.0 9.0 8.5 VGAS/V= 8.0 7.5 7.0 300 200 6.5 6.0 100 5.5 5.0 4.5 0 20 40 60 80 100 Tmb / C 120 140 160 180 0 0 2 4 VDS/V 6 8 10 Fig.2. Normalised continuous drain current. ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 5 V Fig.5. Typical output characteristics, Tj = 25 C. ID = f(VDS); parameter VGS RDS(ON)/mOhm VGS/V = 1000 11 10 tp = 10uS 100uS 1mS ID/A RDS(ON) = VDS/ID 100 9 8 5.5 7 6 10 DC 10mS 100mS 6.0 6.5 7.0 8.0 10.0 5 1 4 1 10 VDS/V 100 0 20 40 ID/A 60 80 100 Fig.3. Safe operating area. Tmb = 25 C ID & IDM = f(VDS); IDM single pulse; parameter tp Fig.6. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(ID); parameter VGS December 1998 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7506-55A 8.5 8 7.5 7 6.5 6 5.5 5 4.5 4 RDS(ON)/mOhm 2.5 Rds(on) normlised to 25degC BUK959-60 2 1.5 1 5 10 VGS/V 15 20 0.5 -100 -50 0 50 Tmb / degC 100 150 200 Fig.7. Typical on-state resistance, Tj = 25 C. RDS(ON) = f(VGS); conditions ID = 25 A; 100 ID/A Fig.10. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 25 A; VGS = 5 V VGS(TO) / V max. BUK759-60 5 80 4 typ. 60 3 min. 40 Tj/C = 20 175 25 2 1 0 0 1 2 3 VGS/V 4 5 6 7 0 -100 -50 0 50 Tj / C 100 150 200 Fig.8. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj 90 gfs/S 80 70 60 50 40 30 20 10 0 0 20 40 ID/A 60 80 100 Fig.11. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS Sub-Threshold Conduction 1E-01 1E-02 2% typ 98% 1E-03 1E-04 1E-05 1E-06 0 1 2 3 4 5 Fig.9. Typical transconductance, Tj = 25 C. gfs = f(ID); conditions: VDS = 25 V Fig.12. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 C; VDS = VGS December 1998 4 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET BUK7506-55A 10 9 8 7 120 110 100 90 80 70 60 Ciss WDSS% Thousands pF 6 5 4 3 2 1 0 0.01 0.1 1 VDS/V 10 Coss Crss 100 50 40 30 20 10 0 20 40 60 80 100 120 Tmb / C 140 160 180 Fig.13. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 12 VGS/V 10 Fig.16. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 75 A + L VDS = 14V 44V VDD 8 VDS VGS 0 RGS T.U.T. R 01 shunt 6 -ID/100 4 2 0 0 20 40 60 QG/nC 80 100 120 140 Fig.14. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 50 A; parameter VDS 100 IF/A 80 Fig.17. Avalanche energy test circuit. 2 WDSS = 0.5 LID BVDSS /(BVDSS - VDD ) + RD VDS Tj/C = 175 25 VDD 60 VGS 0 RG T.U.T. - 40 20 0 0 0.1 0.2 0.3 0.4 0.5 0.6 VSDS/V 0.7 0.8 0.9 1 1.1 Fig.15. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj Fig.18. Switching test circuit. December 1998 5 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET MECHANICAL DATA Dimensions in mm Net Mass: 2 g BUK7506-55A 4,5 max 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 2,54 2,54 0,9 max (3x) 0,6 2,4 Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for SOT78 (TO220) envelopes. 3. Epoxy meets UL94 V0 at 1/8". December 1998 6 Rev 1.100 Philips Semiconductors Product specification TrenchMOSTM transistor Standard level FET DEFINITIONS Data sheet status Objective specification Product specification Limiting values BUK7506-55A This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. (c) Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1998 7 Rev 1.100 |
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